Details |
FromTo |
Name of the Organization |
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Assistant Professor |
August, 2021 |
Till Date |
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Kakatiya Institute of Technology & Science, Warangal. |
Assistant Professor |
October, 2012 |
December, 2016 |
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S.R. Engineering College, Warangal. |
Publications in Refereed Journals | |
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S.No |
Details |
1 |
Sunil Kumar Tumma, Bheema Rao Nistala, (2020) " Design of high performance narrowband low noise amplifier using an orthogonal series stacked differential fractal inductor for 5G applications ", Turkish Journal of Electrical Engineering & Computer Sciences. DOI: 10.3906/elk-elk-1903-185. |
2 |
Sunil Kumar Tumma, Bheema Rao Nistala, "A novel hybrid series stacked inductor differential fractal inductor for MMIC applications ", Circuit World (Emerald Publishing), 2019. DOI: 10.1108/CW-06-2019-0058 |
3 |
Sunil Kumar Tumma, Bheema Rao Nistala, “High-quality factor multipath differential fractal inductor for wireless applications”, Circuit World (Emerald Publishing), 2021. |
S.No |
Details |
1 |
Sunil Kumar Tumma, Bheema Rao Nistala, "Series stacked non-parallel multipath differential inductor for C band applications," Springer Lecture Notes in Electrical Engineering (LNEE), Volume 686, Book chapter |
S.No |
Details |
1 |
Sunil Kumar Tumma, Bheema Rao Nistala, "A novel high Q variable width differential series stacked spiral inductor," IEEE 8th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Delhi, 2017. DOI: 10.1109/ICCCNT.2017.8203906 |
2 |
Sunil Kumar Tumma, Bheema Rao Nistala, "High-Performance variable width multipath multilayer differential inductor," 2017 14th IEEE India Council International Conference (INDICON), Roorkee, 2017, pp. 1- 6. DOI: 10.1109/INDICON.2017.8487545 |
3 |
Sunil Kumar Tumma, S V Krishna Rao, "An Efficient Parallel Multiplier-Accumulator Based on Radix-4 Modified Booth Algorithm using Spurious Power Suppression Technique," 2012 International Conference on Electrical and Electronics Engineering (ICEEE), Hyderabad, 2012 |
4 |
Sunil Kumar Tumma, S V Krishna Rao, "An Improved Wallace Multiplier using Parallel prefix Adder with Reduced Complexity," 2012 International Conference on Advances in Electrical and Electronics Engineering (ICAEEE), Pune, 2012 |
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Undergraduate Level |
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Courses Taught |
Currently Teaching |
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Course |
Semester, Year, Branch |
Course |
Semester, Year, Branch |
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Analog Circuits-I |
III Sem, II Yr, ECE |
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Postgraduate Level |
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S.No |
Details |
1 |
Circuit World, Emerald Publishing |
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